Liquid crystal display devices, due to their thinness and low power consumption, are broadly used in various fields. In particular, active-matrix type liquid crystal display devices have high performance with a high contrast ratio and excellent response characteristics, and are used for television sets, monitors, and laptop personal computers; they are increasing in market size in the recent years.
Generally speaking, an active-matrix type liquid crystal display device includes an active matrix substrate (also referred to as a “TFT substrate”) on which thin film transistors (TFTs) are formed as switching elements corresponding to the respective pixels, a counter substrate (also referred to as a “color filter substrate”) on which color filters and the like are formed, and a liquid crystal layer provided between the active matrix substrate and the counter substrate. An electric field which is in accordance with the potential difference between the common electrode and a pixel electrode electrically connected to a thin film transistor is applied across the liquid crystal layer, this electric field causing a change in the alignment state of liquid crystal molecules in the liquid crystal layer, thereby controlling the light transmittance of each pixel to enable displaying.
Depending on the application, various display modes have been proposed and adopted in active-matrix type liquid crystal display devices. Examples of display modes include the TN (Twisted Nematic) mode, the VA (Vertical Alignment) mode, the IPS (In-Plane-Switching) mode, and the FFS (Fringe Field Switching) mode.
In some display modes, a “two-layer electrode structure” is adopted for the active matrix substrate. A two-layer electrode structure includes the following, on an interlayer insulating layer covering thin film transistors: a lower layer electrode(s), a dielectric layer covering the lower layer electrode(s), and an upper layer electrode(s) overlying the lower layer electrode(s) via the dielectric layer. For example, in the commonly-used FFS mode, as is disclosed in Patent Document 1, a common electrode is provided as a lower layer electrode, and pixel electrodes having a plurality of slits formed therein are provided as upper layer electrodes. Both the common electrode and the pixel electrodes are made of a transparent electrically conductive material. As is disclosed in Patent Document 2, a construction is also known for the FFS mode where pixel electrodes are provided as lower layer electrodes, and a common electrode having a plurality of slits formed therein is provided as an upper layer electrode.
For reasons that will be described in detail later, a two-layer electrode structure may possibly be adopted irrespective of the display mode (that is, also in the VA mode and the like).
When adopting a two-layer electrode structure featuring pixel electrodes as upper layer electrodes, in order to electrically connect a pixel electrode to the drain electrode of a thin film transistor, an aperture through which to expose a portion of the drain electrode must be formed in both the interlayer insulating layer covering the thin film transistor and the dielectric layer located between the electrodes. By forming the pixel electrode so as to be in contact with the drain electrode in a contact hole which includes an aperture through the interlayer insulating layer and an aperture through the dielectric layer, the pixel electrode is allowed to be electrically connected to the drain electrode.
In this case, the etching to form the aperture in the dielectric layer will also erode the tapered portion (slanted side face) of the aperture in the interlayer insulating layer, thus allowing the side face shape of the contact hole to become steep. As a result, the pixel electrode, having a relatively small thickness, may become disrupted in the contact hole (called “stepping”). Therefore, in order to avoid insufficient connection due to stepping of the pixel electrode, the aperture in the dielectric layer is formed so that it wholly fits within the aperture in the interlayer insulating layer when viewed from the normal direction of the substrate.